In recent years, a higher data transfer rate has been required for data transfer between semiconductor devices (for example, data transfer between a CPU and a memory). The amplitude of input/output signal levels is progressively reduced in order to increase a data transfer rate. When input/output signals become smaller, a signal being outputted should have accurate amplitude. Therefore, high accuracy has strictly been required for the impedance of an output buffer.
However, the impedance of an output buffer varies depending upon process conditions of a manufacturing process. When a semiconductor device is actually used, the impedance of an output buffer also varies according to influence from variations of the ambient temperature or variations of a power supply voltage. Therefore, when high accuracy is required for the impedance of an output buffer, an output buffer is provided with a function of adjusting its impedance. Adjustment of the impedance of the output buffer is performed with a circuit provided in a semiconductor device, which is generally referred to as a “calibration circuit.” See JP-A 2008-228332 (Patent Literature 1) and JP-A 2007-213786 (Patent Literature 2).
A calibration circuit includes a replica buffer having the same configuration as an output buffer. For a calibration operation, an external resistor is connected to an external terminal for calibration (calibration terminal) in a semiconductor device. A voltage measured at the calibration terminal is compared with a reference voltage. The impedance of the replica buffer is adjusted depending upon the comparison results. The output buffer is configured to reflect the adjustment of the replica buffer, so that the impedance of the output buffer is adjusted to a desired value.
In a semiconductor device disclosed in Patent Literature 1, the output buffer is formed by a plurality of unit buffers. The impedance of each of the unit buffers is adjusted at a preset value with use of a replica buffer provided in a calibration circuit. At the time of data output or on-die termination (ODT), some of unit buffers are selectively activated so as to set the impedance of the output buffer at a set point.
However, when a plurality of buffer unit circuits are activated at the time of data output or ODT, a voltage drop caused by a power supply line, which is connected in common to those unit buffers, varies depending upon the number of unit buffers being activated. Therefore, the impedance of each of the buffer unit circuits being activated at the time of data output or ODT is different from the impedance that was adjusted to a preset value. Thus, the impedance of the output buffer is problematically deviated from a set point.
Patent Literature 2 discloses a semiconductor device having a pre-emphasis function of lowering the impedance of an output buffer for improving the driving capability of the output buffer. This semiconductor device implements the pre-emphasis function without any separate drivers. The semiconductor device adds an adjustment code of offset data to a code for adjusting the impedance of the output buffer for a certain period of time to thereby strengthen the driving capability of the output buffer. However, with the semiconductor device disclosed in Patent Literature 2, the impedance of each of buffer unit circuits being activated is different from the impedance that was adjusted to a preset value. Thus, the impedance of the output buffer is problematically deviated from a set point.